Cortus is working on the next generation of high-end RISC-V processors for supercomputers.

For this, we are looking for top talent in Digital IC Design (m/f) for our R&D centers of excellence, particularly in Montpellier and Meyreuil (France) where is planned to hire 20+ engineers by 2022 in order to strengthen our on-site team.

The candidate must have a background in digital electronic design with at least 5+ years of experience in digital front-end design and in-depth knowledge of the entire VLSI  flow to perform all dutieq for the own block/IP. The candidate will be versed in advanced RTL design from module/block specifications to RTL verification to provide best-in-class PHY designs for high-performance and/or low power applications.

He/She will be involved in all phases of the design, from concept study and specification, architecture definition, design and verification, to silicon bring-up and characterization directly interacting with system architects, AMS design teams, verification engineers and software team to lead prototyping and emulation flows of the in-house developed processor cores.

The ideal applicants should be familiar on working in a multicultural environment and with teams spread over several sites.

Minimum Requirements

• Engineering masters degree in Electronics/Telecommunications/Computer sciences or equivalent
• Proven 5+ years of experience as digital designer
• Experience in designing of state machines, data paths, arbitration and clock domain crossing logic
• Proficiency to design using System Verilog or VHDL
• Experience with ModelSim, Microsemi Libero, and Git/Gitlab integration
• Capability to drive functional and code coverage as well as timing closure for the designs
• Knowledge of formal tools to support design verification work-out toward a bug-free first silicon
• Experience with development tools for RTL synthesis and debug
• Knowledge of Design For Testability (DFT) techniques
• Scheduling and reporting activities
• English language: written and spoken
• Proven communicatio/interpersonal skills
• Able to assume responsability for a variety of technical tasks and troubleshooting
• Strong sense of responsibility and ability to achieve deadlines

Highly Desired Skills

• Experience with RISC-V ISA
• Experience with DDR
• Basic experience in digital Signal Processing (DSP)
• Matlab
• Software development using C/C++
• Scripting languages (e.g. Python, shell, e.g.)

Job Type and Primary Location

• Full time and permanent
• Remote working up to 2 days per week
• Primary location
  • Meyreuil (13), France
  • Mauguio (34), France
• Application reference : CRTS-FR-MP-2201-DIG

To strengthen our embedded software team at CORTUS, we are opening “Embedded Software Engineers” (m/f) positions for our site Montpellier-Mauguio (34).

Mission : 

You will join a development team spread over two sites (Mauguio and Meyreuil) and will be in charge of the software development of the software IPs necessary for the development of all of the company’s current and future products as well as customer projects.

Your main tasks will :

• Support the development and maintenance of an instruction set simulator for Cortus processors (proprietary ISA and RISC-V), including peripherals.
• Support debug chain maintenance
• Support Eclipse maintenance (plugin CDT)
• Participate in the LLVM port for the Cortus ISA
• Participate in the development of the ecosystem/software suites and drivers constituting the tool chain

Cortus is a multicultural environment company with various working worldwide.

Minimum Requirements

• Engineering masters degree in Electronics/Telecommunications/Computer sciences
• Proven 3 years of experiences as embedded software developer
• Proficiency with C/C++ and scripting, Java
• Knowledge of compilation flow
• Knowledge of open-source software environments : GNU suit, Open OCD, Eclipse…
• Understand software architectures
• English language: written and spoken

Highly Desired Skills

• Write test and test plans
• Compile, assemble and test toolchain
• Keep the changelog

Job Type and Primary Location

• Full time and permanent
• Remote working up to 2 days per week
• Primary location
  • Montpellier (34), France

Cortus is working on next generation IoT connectivity modems building up 5G massive Machine Type Communication (mMTC) chipset that will define ultra-low power, high reliability and low-cost benchmarks for SoC products that rely on NB-IoT, BLE and IEEE 802.15.4.

To become a chip leader  in wireless connectivity for the IoT market, we are looking for the best talents for proactive Mid/Senior Back-End/Layout Design Engineers (m/f) for our R&D centers of excellence, particularly in LECCE (Italy) where is planned to hire 15+ engineers by 2022 in order to strengthen our on site-team.

The candidate must have a background in electronic design with at least 3+ years of experience in integrating IP from external and internal suppliers and be able to streamline layout activities and drive IP requirements in the physical domain. He/she will, (i) work closely with design teams to understand system spec and control physical aspects early in the desugn flow and (ii) assess layout requirements with external partners validating their outputs and keeping track the project schedule for the Back-End side.

The ideal applicants should be familiar on working in a multicultural environment and with teams spread over several sites.

Minimum Requirements

• Engineering masters degree in Electronics/Telecommunications or equivalent
• Deep experience in translating schematics to mask Layouts
• Experience with all aspects of physical ASIC/SoC integration including floorplanning, clock and power distribution, global signal planning, I/O planning and hard IP integration
• Experience with layout implementation criticalities (e.g. matching, electro-migration, Latch-Up and ESD)
• Capability to handle main Physical Design Verification flow steps performing LVS, DRC, ERC, and all required verifications with and corresponding main EDA tools
• Capability to handle top-level layout integration tape-out process, which involves generation of bond diagram/RDL, final clean GDS database and proper documentation
• Knowledge about Analog-On-Top and digital-On-Top approach and methodologies, P&R flow steps
• Scheduling and reporting activities
• English language written and spoken
• Proven communication/interpersonal skills
• Able to assume responsability for a variety of technical tasks and troubleshooting
• Strong sense of reponsability and ability to achieve deadlines

Highly Desired Skills

• Script programming language (e.g.perl, shell, phyton)
• Familiar with packaging engineering

Job Type and Primary Location

• Full time and permanent
• Primary location
  • LECCE (Apulia region), Italy
• Application reference : CRTS-IT-LE-2201-BEE.

Cortus is working on the next generation of IoT connectivity modems building up 5G massive Machine Type Communication (mMTC) chipset that will define ultra-low power, high reliability and low-cost benchmarks for SoC products that rely on NB-IoT, BLE and IEEE 802.15.4.

To become a chip leader in wireless connectivity for the IoT market, we are looking for Mid/Senior Digital Verification Engineers (m/f) for our R&D  centers of excellence, particularly in LECCE (Italy) where is planned to hire 15+ engineers by 2022 in order to strengthen our on-site team.

The candidate must have a background in digital electronic design with at lesat 5+ years of experience in design and verification languages (Verilog, SystemVerilog), methodologies (Formal, UVM) and well knowledged of the entire VLSI flow.

The candidate will be well versed with verification methodology and create verification plan as well as test bench architecture to run digital and top-level simulations using state of the eart EDA tools.

He/She will directly interact with system architects, Digital design team, AMS design teams to lead the verification flows of the CORTU’S SoC family product for wireless connectivity.

The ideal applicants should be familiar on working in a multicultural environment and with teams spread over several sites.

Minimum Requirements

• Engineering masters degree in Electronics/Telecommunications/Computer Science or equivalent
• Deep experience in defining IPs test specification in closed collaboration with product definers and architects
• Strong experience on digital verification methodologies (Formal and UVM) using state of the art EDA tools
• Understand and debug digital RTL
• Determine technology requirements, dependencies and deliverables based on project specifications
• Experience in writing IP verification plans, creating test benches and automating regression test suites to mesure 100% coverage prior tape-out
• Experience with mixes signal (analog, digital) verification methodologies using state state of the art EDA tools
• Capability in developing behavioral models for analog IPs, understand and debug analog schematics
• Knowledge of Design For Testability (DFT) techniques
• Knowledge in configuration database management (Git, SVN)
• English language written and spoken
• Proven communication/interpersonal skills
• Able to assume responsability for a variety of technical tasks and troubleshooting
• Strong sense of reponsability and ability to achieve deadlines

Highly Desired Skills

• Basic Experience with RISK-V ISA
• Basic Experience in Digital Signal Processing (DSP)
• Software development using C/C++
• Script programming language (e.g. perl, shell, phyton)
• Familiar with real-time embedded software (especially debugging)

Job Type and Primary Location

• Full time with permanent contract
• Primary location
  • LECCE (Apulia region), Italy
• Application reference : CRTS-IT-LE-2205-DIG.

Cortus is working on next generation IoT connectivity modems building up 5G massive Machine Type Communication (mMTC) chipset that will define ultra-low power, high reliability and low-cost benchmarks for SoC products that rely on NB-IoT, BLE and IEEE 802.15.4.

To become a chip leader in wireless connectivity for the IoT market, we are looking for Mid/Senior FPGA/DSP Design Engineers (m/f) for our R&D centers of excellence, particurlarly in LECCE (Italy) where is planned to hire 15+ engineers by 2022 in order to strengthen our on-site team.

The candidate must have a background in digital electronic design with at lesat 5+ years of experience in hardware development languages (e.g. Verilog and System Verilog), and well knowledged of the entire VLSI flow.

The candidate will be well versed with verification methodology and test bench architecture as well as simulation of designs using software tools and FPGA platforms. He/She will directly interact with Digital Design, AMS teams and the software team to lead prototyping and emulation flows of System-on-Chip in-house developed.

The ideal applicants should be familiar on working in a multicultural environment and with teams spread over several sites.

Minimum Requirements

• Engineering masters degree in Electronics/Telecommunications/Computer Science or equivalent
• Deep Experience in design, simulate and implement synthesizable RTL for high performance DSP functions on FPGAs platform using VHDL or Verilog
• Deep Experience in FPGA design, simulation/verification, synthesis, timing constraints and timing closure, clock domain crossing, verification and debugging
• Experience to perform architecture and RTL design of 5G Nb-IoT and BLE wireless commhnication systems including documentation, RTL coding, unit and system level simulation
• Experience with ModelSim, Microsemi Libero, Matlab/Simulink, or equivalent, main FPGA software suite (e.g.Vivado, Quartus), and GIT/Gitlab integration
• Capability to handle board level integration with hardware, software and drive developers
• Knowledge of implementing Finite Impulse Response (FIR & IIR) Filters, Fast Fourier Transform (FFT), Discrete Fourier Transform (DFT), Kalma, filter, noise estimation, etc. design structures
• Scheduling and reporting activities
• English language written and spoken
• Proven communication/interpersonal skills
• Able to assume responsability for a variety of technical tasks and troubleshooting
• Strong sense of reponsability and ability to achieve deadlines

Highly Desired Skills

• Familiar with OFDM digital signa modulation and demodulation
• Experience with RISK-V ISA
• Experience in UVM process and Coverage-Driven Constrained Random functional verification
• Software development using C/C++
• Script programming language (e.g. perl, shell, phyton)
• Familiar with real-time embedded software (especially debugging)

Job Type and Primary Location

• Full time with permanent contract
• Primary location
  • LECCE (Apulia region), Italy
• Application reference : CRTS-IT-LE-2202-SYS.

Cortus is working on next generation IoT connectivity modems building up 5G massive Machine Type Communication (mMTC) chipset that will define ultra-low power, high reliability and low-cost benchmarks for SoC products that rely on NB-IoT, BLE and IEEE 802.15.4.

To become a chip leader in wireless connectivity for the IoT market, we are looking for the best talents for Junior/Mid Power Management IC Design Engineers (m/f) for our R&D centers of excellence in LECCE (Italy) where is planned to hire 15+ engineers by 2022 in order to strenghen our on-site team.

The candidate must have a solid background in Analog and Mixed Signal microelectronic with at least 2+ years of experience in power management IC design.

As a Power Management IC designer, you will develop new efficient DC/DC IPs (e.g. bucks, boosts, buck-boosts converters, charge pumps, chargers, LDOs) and implement circuit design with best-practice layout techniques.

He/She will directly interact with system architects, AMS design teams and Back-End engineers for the integration of the Power Management functions into the CORTUS’ SoC family product for wireless connectivity.

The ideal applicants should be familiar to deal in working within a multicultural environment and teams displaced over multiple global locations.

Minimum Requirements

• Engineering masters degree in Electronics/Telecommunications or equivalent
• Deep Experience in design and optimization of voltage regulator high level architecture and low-level circuits, knowing wich are suitable for given applications
• Experience in Power Management architecture tipologies, such as PWM control, constant-on-timr control, and voltage/current mode controls
• Capability to handle the design of CMOS/BCD power management circuits (nuck, boost, LDOs, bandgaps, bias, comparaors, and op-amps) with main EDA tools and meeting performance, area, power and speed constraints
• Capability to review and provide feedback for Printed Circuit Board design from a power perspective and associated I/O
• Knowledge of physical construction and characteristics of capacitor and inductors (on-chip and off-chip)
• Knowledge of Latch-Up and ESD phenomena to assure the functional security of the system
• Scheduling and reporting activities
• English language written and spoken
• Proven communication/interpersonal skills
• Able to assume responsability for a variety of technical tasks and troubleshooting
• Strong sense of reponsability and ability to achieve deadlines

Highly Desired Skills

• Experience modeling circuits in Matlab, VerilogA, Python, or C for concepts prior to implementation
• Validate analog/power design on a lab bench using spectrum analyzers, oscilloscopes, signal generators, etc
• Design with detailed testability, write test plans for trim ans calibration, collaborate with test engineers
• Software development using C/C++
• Script programming language (e.g. perl, shell, phyton)
• Familiar with real-time embedded software (especially debugging)

Job Type and Primary Location

• Full time with permanent contract
• Primary location
  • LECCE (Apulia region), Italy
• Application reference : CRTS-IT-LE-2203-AMS.

Cortus is working on next generation IoT connectivity modems building up 5G massive Machine Type Communication (mMTC) chipset that will define ultra-low power, high reliability and low-cost benchmarks for SoC products that rely on NB-IoT, BLE and IEEE 802.15.4.

To become a chip leader in wireless connectivity for the IoT market, we are looking for Mid/senior Radio Frequency Design engineers by 2022 in order to strengthen our on-site team.

The candidate must have a solid background in RF microelectronic with at least 3+ years of experience in Radio Frequency IC design.

As a Radio Frequency Ic designer, the candidate will specify, design, layout and test Radio frequency (e.g. Pa, LNA, mixer, HF oscillators, LO driver, VGA and TIA blocks in deep sub-micron CMOS technology) directly interacting with system architects, Digital design team, AMS design teams and test engineers for the integration of the RF dunctions into the CORTUs’ SoC family product for wireless connectivity.

The ideal applicants should be familiar on working in a multicultural environment and with teams spread overs several sites.

Minimum Requirements

• Engineering masters degree in Electronics/Telecommunications or equivalent
• Direct tape-out experience in design and test of one or more of the following RF blocks: PA, LNA, mixer, HF oscillators, LO driver, VGA and TIA
• Experience in Power Management architecture tipologies, such as PWM control, constant-on-timr control, and voltage/current mode controls
• Capability to handle the design of CMOS/BCD power management circuits (nuck, boost, LDOs, bandgaps, bias, comparaors, and op-amps) with main EDA tools and meeting performance, area, power and speed constraints
• Capability to review and provide feedback for Printed Circuit Board design from a power perspective and associated I/O
• Knowledge of physical construction and characteristics of capacitor and inductors (on-chip and off-chip)
• Knowledge of Latch-Up and ESD phenomena to assure the functional security of the system
• Scheduling and reporting activities
• English language written and spoken
• Proven communication/interpersonal skills
• Able to assume responsability for a variety of technical tasks and troubleshooting
• Strong sense of reponsability and ability to achieve deadlines

Highly Desired Skills

• Experience modeling circuits in Matlab, VerilogA, Python, or C for concepts prior to implementation
• Validate analog/power design on a lab bench using spectrum analyzers, oscilloscopes, signal generators, etc
• Design with detailed testability, write test plans for trim ans calibration, collaborate with test engineers
• Software development using C/C++
• Script programming language (e.g. perl, shell, phyton)
• Familiar with real-time embedded software (especially debugging)

Job Type and Primary Location

• Full time with permanent contract
• Primary location
  • LECCE (Apulia region), Italy
• Application reference : CRTS-IT-LE-2204-AMS.

Cortus is working on next generation IoT connectivity modems building up 5G massive Machine Type Communication (mMTC) chipset that will define ultra-low power, high reliability and low-cost benchmarks for SoC products that rely on NB-IoT, BLE and IEEE 802.15.4.

To become a chip leader in wireless connectivity for the IoT market, we are looking for Mid/senior Radio Frequency Design engineers by 2022 in order to strengthen our on-site team.

The candidate must have a solid background in microelectronic with at least 3+ years of hands-on experience in developing test plans, developing ATE test program, for validation of silicon SoC.

As a Test engineer, the candidate will specify and develop product functional characterization process as well as definition of test plans and DFT patterns for volume production. He/She will directly interact with system architect, Digital Design teams, AMS teams and the software team to lead the test process for functional verification and mass production of the CORTUS’ SoC family product for wireless connectivity.

The ideal applicants should be familiar on working in a multicultural environment and with teams spread overs several sites.

Minimum Requirements

• Engineering masters degree in Electronics/Telecommunications/Computer science or equivalent
• Hands-on experience with lab test and validation equipment (e.g. oscilloscope, logic analyzer, spectrum analyzer, radio communication tester, etc
• Expertise in test strategies development, test plans definition, DFT, patterns
• Experience in crafting and debugging ATE software programs and hardware for characterization, qualification, and production of SoC devices
• Profiency in programming with Scripting languages (i.e, perl, shell, phyton) and high level languages (i.e, C/C++ or visual Basic)
• Infographic capability to documents the tests and test results
• Capability to handle board level integration with hardware, software and drive developers
• Knowledge in storage products is desires as well as familiarity with ATE architecture, and IC packaging techniques and types
• Knowledge of Semiconductor Manufacturing Process and understanding of semiconductor product life cycle
• Scheduling and reporting activities
• English language written and spoken
• Proven communication/interpersonal skills
• Able to assume responsability for a variety of technical tasks and troubleshooting
• Strong sense of reponsability and ability to achieve deadlines

Highly Desired Skills

• Familiar with VLSI digital formal Verification and Validation design flow
• Familiarity with failure analysis techniques
• Experience with data analysis software in support of characterization reports and yiels reporting tools such as excel vba, galaxy or data conductor

Job Type and Primary Location

• Full time with permanent contract
• Primary location
  • LECCE (Apulia region), Italy
• Application reference : CRTS-IT-LE-2206-TST.