Electronica 2022
Visit us Booth B1-147/6
November 15-18th,2022
Trade Fair Center
Visit us Booth B1-147/6
November 15-18th,2022
Trade Fair Center
Cortus is working on next generation IoT connectivity modems building up 5G massive Machine Type Communication (mMTC) chipset that will define ultra–low power, high reliability and low–cost benchmarks for SoC products that rely on NB–IoT, BLE and IEEE 802.15.4.To become a chip leader in wireless connectivity for the IoT market, we are looking for Mid/senior Radio Frequency Design engineers by 2022 in order to strengthen our on–site team.
The candidate must have a solid background in RF microelectronic with at least 3+ years of experience in Radio Frequency IC design.
As a Radio Frequency Ic designer, the candidate will specify, design, layout and test Radio frequency (e.g. PA, LNA/LNTA, mixer, HF oscillators, LO driver, VGA and TIA blocks in deep sub–micron CMOS technology) directly interacting with system architects, Digital design team, AMS design teams and test engineers for the integration of the RF functions into the CORTUs’ SoC family product for wireless connectivity.
The ideal applicants should be familiar on working in a multicultural environment and with teams spread overs several sites.
▪ Engineering Msc. or Bsc. degree in Electronics/Telecommunications or equivalent;
▪ Direct tape–out experience in design and test of one or more of the following RF blocks: PA, LNA, mixer, HF oscillators, LO driver, VGA and TIA;
▪ Experience in Power Management architecture typologies, such as PWM control, constant–on–time control, and voltage/current mode controls
▪ Capability to handle the design of CMOS/BCD power management circuits (nuck, boost, LDOs, bandgaps, bias, comparators, and op–amps) with main EDA tools and meeting performance, area, power and speed constraints
▪ Capability to review and provide feedback for Printed Circuit Board design from a power perspective and associated I/O
▪ Knowledge of physical construction and characteristics of capacitor and inductors (on–chip and off–chip)
▪ Knowledge of Latch–Up and ESD phenomena to assure the functional security of the system
▪ English language written and spoken
▪ Engineering Msc. or Bsc. degree in Electronics/Telecommunications or equivalent;
▪ Good understanding of the standards NB–IoT, BLE and IEEE 802.15.4
▪ Deep experience in translating schematics to mask Layouts
▪ Experience with all aspects of physical ASIC/SoC integration including floorplanning, clock and power distribution, global signal planning, I/O planning and hard IP integration;
▪ Experience with layout implementation criticalities (e.g. matching, electro–migration, Latch–Up and ESD);
▪ Capability to handle main Physical Design Verification flow steps performing LVS, DRC, ERC, and all required verifications with and corresponding main EDA tools;
▪ Capability to handle top–level layout integration tape–out process, which involves generation of bond diagram/RDL, final clean GDS database and proper documentation;
▪ Knowledge about Analog–On–Top and Digital–On–Top approach and methodologies, P&R flow steps;
▪ Scheduling and reporting activities;
▪ English language written and spoken;
▪ Proven communication/interpersonal skills;
▪ Able to assume responsibility for a variety of technical tasks and troubleshooting;
▪ Strong sense of responsibility and ability to achieve deadlines.
Full time with permanent contract
Primary locations: LECCE, (Apulia region), Italy
CORTUS is working on the next generation of IoT connectivity modems building up 5G massive Machine Type Communication (mMTC) chipset that will define ultra–low power, high reliability and low–cost benchmarks for SoC products.
To become a chip leader in wireless connectivity for the IoT market, we are looking for Mid/Senior Test Engineers (m/f) for our R&D centers of excellence.
The candidate must have a solid background in microelectronic with at least 3+ years of hands–on experience in developing test plans, developing ATE test program, for validation of sili con SoC.
As a Test engineer, the candidate will specify and develop product functional characterization process as well as definition of test plans and DFT patterns for volume production.
He/She will directly interact with system architect, Digital Design teams, AMS teams and the software team to lead the test process for functional verification and mass production of the CORTUS’ SoC family product for wireless connectivity.
The ideal applicants should be familiar to deal in working within a multicultural environment and teams displaced over multiple global locations.
▪ Engineering Msc. or Bsc. degree in Electronics/Telecommunications/Computer Science or equivalent;
▪ Good understanding of the standards NB–IoT, BLE and IEEE 802.15.4
▪ Hands–on experience with lab test and validation equipment (e.g. oscilloscope, logic analyzer, spectrum analyzer, radio communication tester, etc.);
▪ Expertise in test strategies development, test plans definition, DFT patterns.
▪ Experience in crafting and debugging ATE software programs and hardware for characterization, qualification, and production of SoC devices;
▪ Proficiency in programming with Scripting languages (i.e., perl, shell, phyton) and high level languages (i.e., C/C++ or Visual Basic.);
▪ Infographic capability to document the tests and test results;
▪ Capability to handle board level integration with hardware, software and drive developers;
▪ Knowledge in storage products is desired as well as familiarity with ATE architecture, and IC packaging techniques and types;
▪ Knowledge of Semiconductor Manufacturing Process and understanding of semiconductor product life cycle;
▪ Scheduling and reporting activities;
▪ English language written and spoken;
▪ Proven communication/interpersonal skills;
▪ Able to assume responsibility for a variety of technical tasks and troubleshooting;
▪ Strong sense of responsibility and ability to achieve deadlines.
▪ Familiar with VLSI digital formal Verification and Validation design flow;
▪ Familiarity with failure analysis techniques;
▪ Experience with data analysis software in support of characterization reports and yield reporting tools such as excel vba, galaxy, or data conductor.
Full time with permanent contract.
Primary locations: LECCE, (Apulia region), Italy.
Cortus is working on next generation IoT connectivity modems building up 5G massive Machine Type Communication (mMTC) chipset that will define ultra–low power, high reliability and low–cost benchmarks for SoC products that rely on NB–IoT, BLE and IEEE 802.15.4.To become a chip leader in wireless connectivity for the IoT market, we are looking for Mid/senior Radio Frequency Design engineers by 2022 in order to strengthen our on–site team.
The candidate must have a solid background in RF microelectronic with at least 3+ years of experience in Radio Frequency IC design.
As a Radio Frequency Ic designer, the candidate will specify, design, layout and test Radio frequency (e.g. PA, LNA/LNTA, mixer, HF oscillators, LO driver, VGA and TIA blocks in deep sub–micron CMOS technology) directly interacting with system architects, Digital design team, AMS design teams and test engineers for the integration of the RF functions into the CORTUs’ SoC family product for wireless connectivity.
The ideal applicants should be familiar on working in a multicultural environment and with teams spread overs several sites.
▪ Engineering Msc. or Bsc. degree in Electronics/Telecommunications or equivalent;
▪ Direct tape–out experience in design and test of one or more of the following RF blocks: PA, LNA, mixer, HF oscillators, LO driver, VGA and TIA;
▪ Experience in Power Management architecture typologies, such as PWM control, constant–on–time control, and voltage/current mode controls
▪ Capability to handle the design of CMOS/BCD power management circuits (nuck, boost, LDOs, bandgaps, bias, comparators, and op–amps) with main EDA tools and meeting performance, area, power and speed constraints
▪ Capability to review and provide feedback for Printed Circuit Board design from a power perspective and associated I/O
▪ Knowledge of physical construction and characteristics of capacitor and inductors (on–chip and off–chip)
▪ Knowledge of Latch–Up and ESD phenomena to assure the functional security of the system
▪ English language written and spoken
• Experience modeling circuits in Matlab, VerilogA, Python, or C for concepts prior to implementation
• Validate analog/power design on a lab bench using spectrum analyzers, oscilloscopes, signal generators, etc
• Design with detailed testability, write test plans for trim and calibration, collaborate with test engineers
• Software development using C/C++
• Script programming language (e.g. perl, shell, phyton)
• Familiar with real–time embedded software (especially debugging)
Full time with permanent contract
Primary locations: LECCE, (Apulia region), Italy
CORTUS is working on the next generation of IoT connectivity modems building up 5G massive Machine Type Communication (mMTC) chipset that will define ultra–low power, high reliability and low–cost benchmarks for SoC products that rely on NB–IoT, BLE and IEEE 802.15.4.
To become a chip leader in wireless connectivity for the IoT market, we are looking for Junior/Mid Power Management IC Design Engineers (m/f) for our R&D centers of excellence.
The candidate must have a solid background in Analog and Mixed Signal microelectronic with at least 2+ years of experience in power management IC design.
As a Power Management IC designer, you will develop new efficient DC/DC IPs (e.g. bucks, boosts, buck–boosts converters, charge pumps, chargers, LDOs) and implement circuit design with best–practice layout techniques. He/She will directly interact with system architects, Digital design team, AMS design teams and Back–End
engineers for the integration of the Power Management functions into the CORTUS’ SoC family product for wireless connectivity.
The ideal applicants should be familiar on working in a multicultural environment and with teams spread over several sites.
▪ Engineering Msc. or Bsc. degree in Electronics/Telecommunications or equivalent;
▪ Deep experience in design and optimization of voltage regulator high level architecture and low–level circuits; knowing which are suitable for given applications;
▪ Experience in power management architecture topologies, such as PWM control, constant–on–time control, and voltage/current mode controls;
▪ Capability to handle the design of CMOS/BCD power management circuits (buck, boost, LDOs, bandgaps, bias, comparators, and op–amps ) with main EDA tools and meeting performance, area, power and speed constraints;
▪ Capability to review and provide feedback for Printed Circuit Board design from a power perspective and associated I/O;
▪ Knowledge of physical construction and characteristics of capacitor and inductors (on–chip and off–chip);
▪ Knowledge of Latch–Up and ESD phenomena to assure the functional security of the system
▪ Scheduling and reporting activities;
▪ English language written and spoken;
▪ Proven communication/interpersonal skills;
▪ Able to assume responsibility for a variety of technical tasks and troubleshooting;
▪ Strong sense of responsibility and ability to achieve deadlines.
▪ Experience modeling circuits in Matlab, VerilogA, Python, or C for concepts prior to implementation;
▪ Validate analog/power designs on a lab bench using spectrum analyzers, oscilloscopes, signal generators, etc;
▪ Design with detailed testability; write test plans for trim and calibration; collaborate with test engineers;
▪ Script programming language (e.g. perl, shell, phyton);
▪ Familiar with real–time embedded software (especially debugging).
Full time with permanent contract
Primary locations: LECCE, (Apulia region), Italy