The SPI Module is a fully featured Serial Peripheral Interface for an embedded system.
The configurable FIFO depth ensures that the SPI UART can be dimensioned for the application, and the software overhead of serial communication can be optimized without risking losing bytes. The independent transmit and receive interrupts simplify the software architecture. The prescaler and divider, which includes 4 software selectable clock sources, ensures flexibility in baud rate generation.
The SPI Module has the following features:
- Master and slave functionality
- Programmable divider and rescale
- Configurable FIFO depth
- Interrupt generation capability:
- On various FIFO levels
- On error
- Independent interrupts for transmit and receive
- Can wake up the CPU
- Standard APS bus interface