In the Media
- StarChip and Cortus announced a new strategic collaboration to deliver secure solutions for the Internet of Things, Machine to Machine and Industry 4.0 markets (2nd November 2016)
- Cortus Launches High Performance Dual Issue IP Core for Embedded Applications (11th October 2016)
- Leading Russian semiconductor foundry Angstrem-T has developed a design using a Cortus APS core (8th June 2016)
- Optimised cryptographic solution for home automation on Cortus APS3RP core (25th May 2016)
- Cortus Launches Low-Power Floating Point Processor for Intelligent Connected Devices (10th December 2015)
- SKY5000 Dual Card Reader Chip from Synic Solution is based on Cortus APS23 (10th December 2015)
- Cellnetrix offers secure embedded operating system for Cortus-based M2M and IoT integrated circuits (16th November 2015)
- Cortus Marks 10th Anniversary (1st October 2015)
- Development Platform released for Cortus APS IP Cores (3rd June 2015)
- Blunk Microsystems offers TargetTools™ IDE for Cortus Software Development (25th February 2015)
- Cortus Announces Three New Software Partners at Embedded World (25th February 2015)
- Nabto offers its “Internet of Things” Communication Platform on Cortus-based Systems-on-Chips (25th February 2015)
- Cortus and Oryx enable Internet of Things SoC applications with IP v6 stack running on the full range of Cortus processor cores (25th February 2015)
- Micrium and Cortus announce new uC/OS-III Port to Cortus 32 bit Processor Cores (17th February 2015)
Cortus was presented with the “Transition Numérique” prize at the 36 edition of the Des INN’OVATIONS.
Michael Chapman, Sebastien Ternat and Duc Nguyen Huu (right to left) were presented with a cheque for €15000.
In conjunction with the LIRMM and Inria, and with funding from the ANR, Cortus is developing a multi-core heterogeneous high performance computation platform. This new, innovative, architecture implemented on FPGA enables Cortus to put a new high performance core through its paces.
The test environment was re-thought to better meet the needs of the project with multi-tasking sequencers.
This innovative architecture has allowed Cortus to understand in greater depth and better exploit this multi-core architecture. This has given Cortus the opportunity to demonstrate their capabilities in the creation of a complete, complex, non-SMP system – that is powerful yet consumes little power. This approach has shown that a shared calculation approach can reduce power consumption when compared to traditional approaches.
In addition this project has been a platform allowing Cortus to validate Linux on high performance cores and assure a complete Linux & Core solution. This is a veritable show case of the “savoir faire” of Cortus.