IP

/IP
IP 2018-06-18T10:57:12+00:00

You know that the choice of the right IP for your design is crucial to the success of the product. This is why many design projects spend many months selecting, evaluating and testing IP before choosing the best combination of IP for the project. Then there follows the learning curve with the IP for the design engineers and perhaps the integration of IP from different suppliers. With Cortus as your design partner this time is cut. Our engineers know our IP inside out and can select the right IP from our extensive catalogue to create the ideal solution for your requirements quickly – they do this all the time!

Processors

We have a range of processors with various performances, sizes and Instruction Set Architectures (ISAs).
They are suitable for creating SoCs from simple controllers to sophisticated multi-core processing systems.

Datasheet

APS1V

A very compact implementation of the RISC-V RV32IMC, with user and machine modes, static branch predictor, short pipeline

Datasheet
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APS3V

A compact implementation of the RISC-V RV32IMC,  with user and machine modes, static branch predictor and parallel multiplier.

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APS5V

A compact implementation of the RISC-V RV32IMAC,  with user and machine modes, static branch predictor and parallel multiplier.

Dual and multi-core capable.

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FPS29V

A compact implementation of the RISC-V RV32IMAFC,  user and machine modes, static branch predictor and parallel multiplier.

Dual issue and single precision floating point.

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FPS69V

An implementation of the RISC-V RV64GC,  user and machine modes, static branch predictor and parallel multiplier.

64 bit, dual issue and double & single precision floating point.

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APSX2 Family

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APSX2 Family

The APSX2 Family are high performance, energy efficient, processors for embedded systems that require demanding high performance operating systems support.

They feature a fully-out-of-order multiple issue architecture and have full MMU support.

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Cortus ISA – High Code Density

Datasheet

APS23

General purpose, high code density CPU with minimal silicon footprint.
Variants :
 – Sequential multiplier
– Parallel multiplier

Datasheet
Datasheet

APS25

High performance, high code density CPU for sophisticated control.

Datasheet
Datasheet

APS25s+

High performance, high code density, short pipeline CPU with static branch predictor.

Datasheet
Datasheet

FPS26

High performance, high code density CPU with single precision floating point

Datasheet
Datasheet

APS29

Very high performance, dual issue processor with high code density and static branch predictor.

Datasheet

Cortus ISA – Low Get Count

Datasheet

APS3R

General purpose low power CPU with a small silicon footprint.
Variants :
– Sequential multiplier
– Parallel multiplier

Datasheet
Datasheet

APS5

High performance CPU for sophisticated control tasks, retaining a small silicon footprint.
Variants :
– Short pipeline – easy timing closure
– Long pipeline – high achievable clock frequency

Datasheet
Datasheet

FPS6

High performance CPU with single precision floating point.

Datasheet

Digital IP

Peripherals

We have a large selection of peripheral IP, including:

Standard microcontroller peripherals; timers, interrupt controllers, UARTs, I2C, SPI, debugging, memory controllers, etc.
Interface and communications IP; Ethernet, USB (device and host), JTAG, and so on Advanced peripherals such as MMU, MPU, Security peripherals

Standard Peripherals

SIMPLE COUNTER
GENERAL PURPOSE I⁄O
JTAG
TIMER
COMPARE UNIT (PWM)
CAPTURE UNIT
SIMPLE FIXED BAUD RATE
UART
FRACTIONAL BAUD RATE UART
SPI
I2C
WATCHDOG

Medium Complexity

INSTRUCTION CACHE
DATA CACHE
APB™ BRIDGE
AHB-LITE™ BRIDGE
MMU
TRACE BUFFER

Feature Rich Peripherals

ETHERNET MAC (10/100)
USB 2.0 DEVICE MAC
USB 2.0 OTG MAC

Security IP

We have a range of security solutions

Secure debug IP and software tools. Encryption, TRNG, etc.

Analog & RF IP

We have all the analog IP necessary for creating sophisticated SoCs, with interfaces to wide range of external devices and technologies from DC upwards…

They include: analog to digital and digital to analog converters, crystal oscillators, PVT sensors, RF receivers and transmitters, RF mixers, modulators, filters, LNA, amplifiers, PLLs, DC-DC converters and regulators, etc.

Tools

IDE

Based on Eclipse
Full support for all Cortus APS and FPS features
Interactive Debug
GNU Debugger (GDB)
Full Symbolic Debug
Full OpenOCD support
Redistributable
Customer branding possible
Subject to licensing

Toolchain

Based on GNU GCC
Full support for all Cortus APS features
Interactive Debug
GNU Debugger GDB
Full Symbolic Debug
Supported by the Cortus EtherTag
Redistributable
Customer branding possible

Cortus Development Platform

The Cortus Development Platform comprises a board based on a Xilinx Spartan®-6SLX75, the Cortus Eclipse IDE and the Cortus GCC toolchain. The board includes an I/O footprint compatible with the Arduino Due enabling the wide choice of Arduino Due compatible shields to be used to extend the platform.

The FPGA has ample capacity for both evaluating our processor cores and for systems development. A Cortus APS23 system uses 19% of the FPGA resources and an APS25 29%. There is ample space for developing multi-core systems.

The Development Platform also enables software development before the SoC design is finalised.

The Development Platform has the following features:

Xilinx Spartan®-6SLX75
1 MByte Synchronous SRAM
32 Mbit SPI Flash
10/100 Mbit/s Ethernet PHY
Integrated USB ↔ JTAG Interface
USB ↔ Serial Interface
8 LEDs

OpenOCD

Cortus has chosen the widely used OpenOCD in conjuntion with the GNU Debugger to provide a simple and smooth debugging experience.

OpenOCD is compatible with a number of JTAG probes, from very low cost for full featured. This also includes the JTAG interface of the Cortus Development Platform.

A debug solution via a UART interface is also supported as an alternative to a JTAG interface.