Simple Counter
The Counter provides a periodic interrupt, ideal for general timing in an embedded system. It is typically used to provide the O/S timer. It was designed to be simple to use and light in terms of silicon footprint.
A 32 bit count register is decremented at the rate of the system clock and an interrupt can be generated when the register reaches zero. The count register is reloaded with the value programmed in the reload register when it reaches zero, ensuring repeated interrupts.
The Counter has the following features:
- 32 bit counter register
- Interrupt generation capability
- Can wake up the CPU
- Standard APS bus interface
See also the timer, which offers much more functionality (with a larger silicon footprint).