The Cortus APS1 is a native 32 bit core with a modern RISC architecture. In common with other Cortus processors,
the APS1 has a 5 to 7 stage integer pipeline with out-of-order completion ensuring that most
integer instructions (load and stores included) are executed in a single cycle.
Most applications running on 8-bit processor cores will benefit from moving to APS1. For applications requiring larger address spaces the APS3R is recommended. The Cortus APS1 fully supports developing with C or C++ and does not require any coding in assembler. With more processing performed per cycle, fewer cycles are needed compared to an 8-bit core and the processor spends more time asleep. With a larger register set fewer memory accesses are required; further conserving energy.
The APS1 is a fully 32 bit general purpose CPU, designed to meet and exceed the needs of many embedded systems. It is an ideal replacement for 8-bit microcontroller cores in new designs.
The entire GNU GCC toolsuite has been ported to this architecture and is available free of charge.
The APS1 has the following features:
- Fully 32 bit
- Sixteen 32 bit registers
- 64 KBytes of addresible data memory
- 64 KBytes of addresable program memory
- 64 KBytes of peripheral space
- All necessary tools are available:
- Eclipse based IDE
- GNU GCC and all utilities ported
- GNU GDB Debugger available
- Debug via JTAG
- All tools available free of charge
- Excellent code density
- Very low gatecount, CPU from 7700 gates
- Very power efficient
- Most integer instructions are single cycle, including load and store
- Available as a GTECH netlist
More details can be found in the datasheet.